68000 Book Review (Part 1)

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The Motorola 68000 family of processors entered the market in 1979.  With a 32-bit CISC instruction set and 24-bit address bus, the 68000 was a powerful processor that spawned a long, successful line of microprocessors and microcontrollers.  The Freescale Coldfire line is the modern descendent.

My interest in the 68000 family started in college, and I’m still fond of it.  Good documentation and an orthogonal instruction set make the processor pleasant to program.  My robot, Bluebot, uses the 68332 descendant.

I’ve seen several references and positive reviews online about two books on the 68000, one by Wilcox and the other by Krantz & Stanley, but there are few online details about the contents.  I borrowed copies from the library and want to share my thoughts.  This book review comes in two parts with the second coming soon.

68000 Microcomputer Systems: Designing and Troubleshooting (Alan D. Wilcox, Ph.D., P.E.)

This is a hardware book detailing engineering design process, digital logic, and 68000 hardware with the S-100 bus.  The discussion of often overlooked digital design topics, such as loading, fanout, timing, propagation delay, and logic levels, is excellent.  The author presents several complete, well-documented 68000-based designs.  The N8VEM project is currently recreating a design from this book.

This book is excellent if you’re building or repairing 68000 systems.  It’s also a good general resource for digital logic with discrete gates.  The design process material is pretty good, too, although you’re probably better off with a more modern text if that’s your only interest.  I recommend this book and want to add it to my shelf.

Table of Contents

PART I Engineering Design
  • 1. Engineering Design: A Creative Activity that Requires Planning
    • 1.1 Design Overview
    • 1.2 Problem Solving
    • 1.3 Project Planning
    • 1.4 Summary
    • Exercises
    • Further Reading
  • 2. Project Implementation: Bring Ideas to Reality
    • 2.1 Project Overview
    • 2.2 Analysis
    • 2.3 Synthesis
    • 2.4 Technical Design
    • 2.5 Evaluation and Decisions
    • 2.6 Prototype Construction
    • 2.7 Evaluation and Documentation
    • 2.8 Summary
    • Exercises
    • Further Reading
  • 3. Design Rules and Heuristics: Guidelines and Common Sense
    • 3.1 Technical Design Rules
    • 3.2 Design Heuristics
    • 3.3 Summary
    • Exercises
    • Further Reading
  • 4. Design Documentation: Putting Ideas on Paper
    • 4.1 Laboratory Notebook
    • 4.2 Technical Manual
    • 4.3 Drawing Guidelines
    • 4.4 Example Technical Manual
    • 4.5 Summary
    • Further Reading
  • 5. Clock Design Example: Reality
    • 5.1 Need Identification
    • 5.2 Project Plan
    • 5.3 Project Implementation
    • 5.4 Documentation
    • 5.5 Summary
    • Exercises
    • Further Reading
PART II System Design and Construction
  • 6. System Planning and Design: The Big Project
    • 6.1 Need Identification
    • 6.2 Project Plan for the 68000 CPU
    • 6.3 General Strategy
    • 6.4 Summary
    • Exercises
    • Further Reading
  • 7. An Overview of the 68000
    • 7.1 Software Issues
    • 7.2 Hardware Features
    • 7.3 Bus Operation
    • 7.4 Example Timing Diagrams
    • 7.5 Summary
    • Exercises
    • Further Reading
  • 8. Testing and Troubleshooting
    • 8.1 Test Equipment
    • 8.2 Testing the Educational Computer Board (ECB)
    • 8.3 Testing and Troubleshooting Techniques
    • 8.4 Designing for Testability
    • 8.5 Summary
    • Exercises
    • Further Reading
  • 9. Bringing Up the Microprocessor
    • 9.1 Minimum System Design
    • 9.2 IEEE Std-696 System Design
    • 9.3 Single-Step Module Design
    • 9.4 Summary
    • Exercises
    • Further Reading
  • 10. Memory Design
    • 10.1 Memory Design
    • 10.2 EPROM Circuit Design
    • 10.3 Address Decoder Design
    • 10.4 Reset Vector Generation
    • 10.5 An Example RAM Design
    • 10.6 EPROM and RAM Circuit Design
    • 10.7 IEEE Std-696 System Design
    • 10.8 Summary
    • Exercises
    • Further Reading
  • 11. Input/Output Design
    • 11.1 Synchronous Interface
    • 11.2 ECB Interface
    • 11.3 A Single-Port Interface
    • 11.4 A Two-Port Interface
    • 11.5 Summary
    • Exercises
    • Further Reading
  • 12. Exception Processing
    • 12.1 Processing States and Exceptions
    • 12.2 Privilege States
    • 12.3 Reset Exception Processing
    • 12.4 Internally-Generated Exceptions
    • 12.5 Bus- and Address-Error Processing
    • 12.6 Interrupt Exceptions
    • 12.7 Example Design
    • 12.8 Summary
    • Exercises
    • Further Reading
  • 13. Bus Interface Design
    • 13.1 Operation of the S-100 Bus
    • 13.2 Bus-State Generator Design
    • 13.3 Bus Arbitration
    • 13.4 Data Bus Control Logic
    • 13.5 Status and Address Bus Logic
    • 13.6 Summary
    • Exercises
    • Further Reading
  • 14. Software Issues
    • 14.1 TUTOR Firmware
    • 14.2 Cross-Assembly Techniques
    • 14.3 Bringing up CP/M-68K
    • 14.4 Summary
    • Exercises
    • Further Reading
APPENDIX A Standards for Schematic Diagrams
APPENDIX B Temperature Monitor Technical Manual
APPENDIX C 68000-Based CPU Board Technical Manual
APPENDIX D Technical Manual: 68000 CPU Board
APPENDIX E Data Sheets
APPENDIX F Interrupts for the MC68000
APPENDIX G MC68000 Family Fact Sheet
APPENDIX H RS-232C Serial Communications
APPENDIX I Teaching Notes
Index